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News for 25-07-2026

NIELIT and SCL Mohali Collaborate to Make Indigenous 1.2 µm Process Design Kit Available on eChipHub

SUMMARY

NIELIT and SCL Mohali have partnered to make India's indigenous 1.2 µm Process Design Kit available on the eChipHub platform, strengthening the semiconductor design ecosystem under the India Semiconductor Mission.

Exam Oriented Concise Information

Important Banking

The National Institute of Electronics and Information Technology (NIELIT) has collaborated with the Semiconductor Laboratory (SCL) in Mohali to make the indigenous 1.2 µm Process Design Kit (PDK) available through eChipHub.

It is to be noted that SCL is an autonomous organization under the Ministry of Electronics and Information Technology (MeitY). The eChipHub platform is managed by NIELIT under a MeitY-funded project titled 'Development of EdTech Platform in Semiconductor Space to Democratize Chip Design and Development Ecosystem for Masses'.

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The National Institute of Electronics and Information Technology (NIELIT) and the Semiconductor Laboratory (SCL) in Mohali have partnered to make India’s indigenous 1.2 µm Process Design Kit (PDK) available through the eChipHub platform. This collaboration brings an indigenous chip design toolkit to students, researchers, startups, and industry professionals across the country, supporting the goals of the India Semiconductor Mission (ISM). The PDK will be accessible through a secure Aadhaar-authenticated download system, enabling a complete design-to-fabrication workflow using Indian-developed process technology.

Understanding the 1.2 µm Process Design Kit

A Process Design Kit (PDK) is a collection of technical files, design rules, simulation models, and pre-built component libraries that chip designers need to create integrated circuits (ICs) for a specific semiconductor manufacturing process. It functions as a bridge between the design stage and the fabrication stage, providing all the specifications required to ensure that a chip designed on a computer can be physically manufactured in a wafer fab.

The 1.2 µm (micrometre) technology refers to the minimum feature size that can be etched onto a silicon wafer. While 1.2 µm is considered a mature node by global standards, it remains highly relevant for fabricating chips used in power management, sensors, microcontrollers, automotive electronics, and space-grade components. The 1.2 µm CMOS (Complementary Metal-Oxide Semiconductor) process is well-suited for applications that demand high reliability and radiation hardness rather than extreme miniaturisation.

The PDK developed by SCL is an indigenous kit built for its in-house fabrication line. By integrating this PDK with open-source Electronic Design Automation (EDA) toolchains on eChipHub, the collaboration has created one of India’s first indigenous design-to-fabrication learning pathways. Users can now carry out the complete chip design workflow from RTL design and simulation to synthesis, physical implementation, and fabrication-oriented design, all using Indian-developed process technology.

eChipHub: A National Platform for Semiconductor Education

eChipHub is a comprehensive EdTech platform in the semiconductor space, implemented and managed by NIELIT. It was developed under a MeitY-funded project titled “Development of EdTech Platform in Semiconductor Space to Democratize Chip Design and Development Ecosystem for Masses”, with SoCTeamup Semiconductors Pvt. Ltd. as the joint development partner.

The platform serves as a national hub for semiconductor design education and capacity building. It offers a range of resources including cloud-based virtual laboratories, implementation-oriented courses, Faculty Development Programmes (FDPs), workshops, internships, hackathons, and collaborative chip design projects. Through the ongoing MeitY-funded initiative, NIELIT aims to train nearly 30,000 students in semiconductor design using these resources.

The integration of the SCL 1.2 µm PDK into eChipHub significantly strengthens the platform’s offerings. The PDK will be made available through a secure Aadhaar-authenticated download mechanism, ensuring responsible access while encouraging broader adoption across the semiconductor ecosystem. This approach balances open access for skill development with the need to protect indigenous intellectual property.

The Institutions Behind the Collaboration

Semiconductor Laboratory (SCL), Mohali

The Semi-Conductor Laboratory (SCL) in Mohali, Punjab, is an autonomous research institute under the Ministry of Electronics and Information Technology (MeitY). Founded in 1976 as Semiconductor Complex Limited, it was originally a public sector undertaking. After a devastating fire in 1989 that destroyed its facility, SCL restarted production in 1997 and was later reorganised as a research-focused laboratory in 2005.

SCL is India’s only integrated device manufacturing (IDM) facility with an operational wafer fabrication line. It operates an 8-inch CMOS and 6-inch MEMS wafer fabrication line at the 180 nm technology node, along with facilities for VLSI design, assembly, packaging, and testing. Chips manufactured by SCL have been used in India’s Mars Orbiter Mission (Mangalyaan) and the SHAKTI indigenous microprocessor developed by IIT Madras.

The government has approved a significant modernisation of SCL with an investment of ₹4,500 crore to upgrade its capabilities, including the establishment of the Bharat Semiconductor Research Centre (BSRC) co-located at SCL.

National Institute of Electronics and Information Technology (NIELIT)

NIELIT is an autonomous scientific society under MeitY, with its headquarters in New Delhi. Established in 1994 as the DOEACC Society and renamed NIELIT in 2011, it is a premier institution for skill development in electronics and information technology.

NIELIT operates through 56 centres across the country and has been conferred the status of “Deemed to be University” by the Ministry of Education, with its main campus at Ropar, Punjab. It runs the well-known O, A, B, and C level certification programmes in IT and electronics and serves as a national accreditation body for non-formal electronics courses. Its SMART Lab at NIELIT Calicut has already trained more than 62,000 engineers in semiconductor technologies.

The MoU That Paved the Way

On 25 April 2025, NIELIT and SCL signed a Memorandum of Understanding (MoU) in the presence of MeitY Secretary S. Krishnan. The MoU established a framework for collaboration in semiconductor research and development, innovation, skilling, indigenous technology development, and academia-industry partnerships. The current integration of the 1.2 µm PDK on eChipHub is a direct outcome of this agreement.

Strengthening India’s Semiconductor Ecosystem

This collaboration aligns with and supports the broader India Semiconductor Mission (ISM), which was launched by the Union Cabinet in December 2021 with an incentive framework of ₹76,000 crore. The mission aims to build a comprehensive semiconductor ecosystem in India spanning design, fabrication, assembly, testing, and packaging.

The partnership between NIELIT and SCL is particularly significant for several reasons. First, it democratises access to semiconductor design tools by making an indigenous PDK available on a national platform, removing the barrier of expensive proprietary software licences. Second, it creates a talent pipeline for the semiconductor industry by enabling hands-on learning through the complete design-to-fabrication workflow. Third, it supports the objectives of ISM 2.0, which was announced in the Union Budget 2026-27 with a provision of ₹1,000 crore for FY 2026-27 and focuses on producing semiconductor equipment and materials in India, designing full-stack Indian semiconductor intellectual property, and fortifying supply chains.

Under the ongoing MeitY-funded EdTech project, NIELIT aims to train nearly 30,000 students through structured courses, bootcamps, faculty development programmes, internships, and industry-academia collaborative initiatives. The integration of the SCL PDK with open-source EDA toolchains creates a sustainable learning ecosystem where students and researchers can design, prototype, and prepare chips for fabrication using wholly indigenous technology.

Key Takeaways

  • NIELIT and the Semiconductor Laboratory (SCL) in Mohali have collaborated to make the indigenous 1.2 µm Process Design Kit (PDK) available on the eChipHub platform.
  • The 1.2 µm PDK is an indigenous chip design toolkit integrated with open-source EDA toolchains, creating one of India’s first design-to-fabrication learning pathways using wholly Indian process technology.
  • SCL, established in 1976, is India’s only integrated device manufacturing facility and operates an 8-inch CMOS wafer fabrication line at the 180 nm node under MeitY.
  • NIELIT, headquartered in New Delhi and established in 1994, manages eChipHub under a MeitY-funded project and aims to train 30,000 students in semiconductor design.
  • The collaboration builds on an MoU signed on 25 April 2025 between NIELIT and SCL and supports the objectives of the India Semiconductor Mission (ISM) launched in December 2021.
  • The PDK will be accessible through a secure Aadhaar-authenticated download mechanism, balancing open access with protection of indigenous intellectual property.

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